PIC18LF66K80-I/PT【PDF 34/351 页】MCU PIC ECAN 64KB FLASH 64TQFP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3841

30页 31页 32页 33页 [34页]35页 36页 37页 38页

2010-2012 Microchip Technology Inc.

DS39977F-page 129

PIC18F66K80 FAMILY

7.0

FLASH PROGRAM MEMORY

The Flash program memory is readable, writable and

erasable during normal operation over the entire VDD

range.

A read from program memory is executed on one byte

at a time. A write to program memory is executed on

blocks of 64 bytes at a time. Program memory is

erased in blocks of 64 bytes at a time. A bulk erase

operation may not be issued from user code.

Writing or erasing program memory will cease

instruction fetches until the operation is complete. The

program memory cannot be accessed during the write

or erase, therefore, code cannot execute. An internal

programming timer terminates program memory writes

and erases.

A value written to program memory does not need to be

a valid instruction. Executing a program memory

location that forms an invalid instruction results in a

NOP

7.1

Table Reads and Table Writes

In order to read and write program memory, there are

two operations that allow the processor to move bytes

between the program memory space and the data RAM:

Table Read (TBLRD)

Table Write (TBLWT)

The program memory space is 16 bits wide, while the

data RAM space is 8 bits wide. Table reads and table

writes move data between these two memory spaces

through an 8-bit register (TABLAT).

Table read operations retrieve data from program

memory and place it into the data RAM space.

Figure 7-1 shows the operation of a table read with

program memory and data RAM.

Table write operations store data from the data memory

space into holding registers in program memory. The

procedure to write the contents of the holding registers

into program memory is detailed in Section 7.5 “Writing

to Flash Program Memory”

. Figure 7-2 shows the

operation of a table write with program memory and data

RAM.

Table operations work with byte entities. A table block

containing data, rather than program instructions, is not

required to be word-aligned. Therefore, a table block can

start and end at any byte address. If a table write is being

used to write executable code into program memory,

program instructions will need to be word-aligned.

FIGURE 7-1:

TABLE READ OPERATION

Table Pointer(1)

Table Latch (8-bit)

Program Memory

TBLPTRH

TBLPTRL

TABLAT

TBLPTRU

Instruction: TBLRD*

Note 1:

The Table Pointer register points to a byte in program memory.

Program Memory

(TBLPTR)

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式